making a change to the hardware floating-point architecture of Simba.
i think it’s really important to not only have quad, double, single & half precisions, but also to be able to independently address those in each register when doing ALU stuff
this register addressing granularity takes 4 bits
which operation being done takes another 4 bits
and currently, addressing the source and destination register takes 8 bits
in the 16-bit opcode length that leaves no room for the rest of the ISA
i am happy to take as a consolation the fact that i had 1 number leftover for “int 128”, which tells the ALU to instead treat the register contents as 128 bit integers instead of IEEE floats
this means hw support for calculating on the entire variety of usable number sizes
so to make this compromise i must take register addressing down to 7 bits, and it seems the best way to do this is to cut the number of FP registers in half, from 32 to 16.
this gives me 1 bit to set high and devote to all this FP instruction encoding.