high-level product overview:
– 32 general-purpose 64-bit integer registers
– 32 quad-precision 128-bit floating point registers
– fixed-width 16-bit opcode size
– 16-bit addressing of a hybrid memory layout
– epiphany-like memory architecture for massive performance-per-watt
this is the second iteration, created as i copied the ISA over from my excel workbook for Project Tristan.
it is not only less clunky but wastes no ISA space for instructions while balancing it with the needed functionality.